Low-voltage bulk-driven mixer with on-chip balun

The design and simulation of a pair of bulk-driven low-voltage down-conversion mixers with on-chip transformer baluns is presented. The addition of a passive balun improves gain and can provide impedance matching for optional off-chip image-reject filters. The mixers operate in the 5.8 GHz ISM band and consume 1 mW while achieving an input-referred 1dB compression point of 1 dBm with a gain of 3 dB and a noise figure of 27 dB, and a ∓13 dBm compression point with a gain of 13 dB and a noise figure of 17 dB.

I. Introduction

Emerging wireless applications such as sensor networks and implantable medical devices, where power supply options and space are limited, are made possible by the continued size and power reduction of CMOS system-on-chip technology. The mixer topology discussed in this paper is an adaptation of the CMOS implementation of the classic Gilbert double balanced mixer, targeted at ultra-low-power applications. This adaptation uses the body-effect principle to lower the operating voltage requirements of the mixer. There have been a number of reports of bulk-driven mixers in recent years (e.g., [1]–[5]), indicating that these are indeed potential candidates for low-voltage low-power CMOS transceivers. In this work, the mixer performance is further improved with the addition of an on-chip passive transformer balun.