Measurement of interconnect loss due to dummy fills

This paper reports measurement results of on-chip interconnects with CMP dummy fill. CMP dummy fill is a floating metal for metal density adjustment. In high frequency above 10GHz, the eddy current induced in dummy fills affects the interconnect loss. We fabricated test structures of on-chip interconnect with dummy fills. From the measurement results, the effect of the dummy fills on the wire resistance is not negligible even if the ground wires are adjacent to the signal wire. The dummy fills in the upper/lower metal layer affect the wire resistance and the resistance increases by 20% at 50GHz.

Introduction

According to the technology scaling, the performance of LSIs is improving rapidly. On the other hand, one of the serious problems in sub-100nm era is process variation. There are a number of factors in process variation such as lithography, CMP (Chemical Mechanical Planarization) and so on [1]. In CMP stage, nonuniform metal density causes thickness variation of the metal and ILD (Inter Layer Dielectric), thus CMP dummy fill is used to adjust the metal density. The effect of dummy fills on interconnect characteristics has been discussed from the viewpoint of the capacitance [2]–[4]. Conventionally, the effect of dummy fills on the resistance and the inductance is considered to be negligible. References [5], [6] show that the eddy current in dummy fills affect the wire resistance and the eddy current becomes significant above 10GHz. However the discussion in Refs. [5], [6] are based on a field-solver and the effect of the dummy fills is not verified by real chip measurement.