A Compact Model for Fully Overlapped LDD FD SOI MOSFETs

The goal of this paper is to propose a simple and efficient physics-based threshold voltage model for short-channel FD SOI MOSFETs with fully-overlapped LDD structures. The model which is based on the solution of the two-dimensional (2D) Poisson's equation in the thin SOI as well as the gate and buried oxides, has considered the voltage drop in the LDD region by introducing empirical parameters, and has merits of the bulk LDD counterpart.