A 2.5 Gbps CMOS Fully Integrated Optical Receicer with Lateral PIN Detector

This paper presents the design of a monolithically integrated CMOS optical receiver, including a photo detector, a transimpedance amplifier, and a post limiting amplifier on a single chip. A novel PIN detector is proposed and adopted in this design without technology modification. The optical receiver is capable of delivering 420 mV
_pp
to 50 Ω output load and operating up to 2.5 Gbps without an equalizer. Implemented in a generic 0.18μm CMOS technology, the total power dissipation is 138mW. The chip size is 0.53mm
²
.