1. INTRODUCTION
Power consumption is an important parameter in system design. This is true not only for battery operated mobile or long-term deployed devices [1] but also for systems attached to a power line. There, a reduced power consumption results in lower cooling effort, higher circuit reliability, and lower energy costs, which are all major reasons to increase the according design effort. As more and more systems are based on FPGAs, also the FPGA industry is investigating ways to reduce the power consumption of their configured designs, e.g., on Xilinx Virtex FPGAs in networking applications, to deliver the best fitting implementation at any time, thus reducing the overall power requirements.