A High-Speed High-Resolution Low-Distortion CMOS Bootstrapped Switch

This paper presents a low-voltage and low-distortion CMOS bootstrapped switch that adopts a new technique to improve the accuracy of sample-and-hold (S/H) circuits. In order to reduce distortion due to variation of the gate overdrive and the threshold voltage in conventional bootstrapped switches, a PMOS-type bootstrapped circuit combining with a NMOS-type one forms a double sampling switch that transmits input signals to the output terminal. The switch reduces the on-resistance greatly and keeps it constant, resulting in precise sampling of signals and better input bandwidth. A test S/H circuit based on this switch was designed and fabricated in SMIC 0.18-μm CMOS mixed signal technology. Experiments show at 100 MSample/s, a peak signal-to-noise-and-distortion ratio (SNDR) of 100.9 dB, spurious-free dynamic range (SFDR) of 102 dB and total harmonic distortion (THD) of 101 dB can be acquired, and for input frequency up to the Nyquist frequency, this circuit maintains SNDR over 90 dB, SFDR and THD better than 92.7 dB, respectively