Continuous Compensation of Binary-Weighted DAC Nonlinearities in Bandpass Delta-Sigma Modulators

We present a novel calibration technique to compensate for DAC element mismatches in bandpass multibit delta-sigma (Δ-Σ) modulators. The proposed technique is purely digital and requires only a minor modification to the modulator loop. It is compatible with binary weighted element DACs and the storage requirements for the calibrated coefficients increases only linearly with the number of quantizer bits. The calibration is performed without breaking the loop, which allows continuous tracking of environmental drifts. Simulation results show a peak signal to noise and distortion ratio (SNDR) of 68 dB after calibration for a DAC with ±1% mismatches, a sinusoid input signal near 1/4 of the sampling frequency and an oversampling ratio of only 10. Those results represent a 26 dB improvement over the non-calibrated case while being within 2 dB of an ideal-DAC case.

I. Introduction

Bandpass multibit modulators are attractive for communication systems because they allow digitization early in the receiver's chain while achieving high resolution at low oversampling ratios (OSR) [1]. However, it is well known that the required linearity of the feedback DAC must be in the vicinity of the overall desired modulator resolution. Practical layout techniques with current CMOS processes limits the DAC linearity to 10 bits.