I. Introduction
Making RF and analog design consistent with a time to market approach is the main challenge in the continuously evolving cellular telecommunication market. The constraint is simple: how can the cell phone be compatible with a maximum number of standards, yet remaining small, cheap and quickly available? An answer is CMOS SoC integration. If this integration is successfully achieved in a CMOS process with no specific analog option, both size and cost issues are addressed. However, the crucial point, in order to take greatest advantage of digital integration, is the design of RF functions that can be integrated with a digital core. Whereas digital IP can quickly be ported in the latest technology node, its analog counterpart needs to be specifically designed to match the technology new constraints (reduced supplies, increased flicker noise, degraded passives…).