Effects of Etching Holes on Capacitance and Tuning Range in MEMS Parallel Plate Variable Capacitors

This paper presents extensive simulations of MEMS parallel plate variable capacitors with attention dedicated towards variations in etching holes' properties. For various separation distances between the plates, different hole sizes and density were created and capacitances were extracted. Within typical values, it was found that the configuration of the holes might affect the tuning range by no more than 16% at extreme cases of their theoretical counterparts. Simulations were done using finite element modeling