A Reconfigurable Multi-Modulus Modulo Multiplier

This paper presents a novel architecture for a multi-modulus reconfigurable modulo multiplier with moduli selectable from the set {2 ⁿ-1, 2ⁿ, 2ⁿ+l}. The efficient unification of the bottleneck modulo 2ⁿ+l multiplication leads to its performance nearly matching that of the modulo 2ⁿ-1 multiplier. The proposed modulo 2ⁿ+l multiplier is well-suited for applications in multi-modulus reconfigurable architectures. The reconfigurability is achieved by a universal structure of multi operand modulo adder (MOMA) and two-operand modulo adder. The advantages and applications of a low-complexity configurable architecture for modulo multiplication that incurs little speed penalty compared to the single-function case is presented. Area and timing overheads are inevitably incurred by the multiplexers required for switching between the modulus. They represent a minor penalty to be paid for the agile reconfigurability. Synthesis results in TSMC 0.18mum CMOS technology proved the efficacy of the proposed architectures

I. Introduction

Applications of modulo arithmetic extends to fields as varied and extensive as Residue Number System (RNS) applications, fault tolerant computer systems, Fermat number transforms and cryptography [1]. Modulo addition and multiplication form the basis for most modulo arithmetic units [2]. The efficient implementation of modulo adders and multipliers is thus a cornerstone of efficient modulo arithmetic implementation. Special moduli sets consisting of moduli of the types have advantages in terms of their efficient implementation of modulo arithmetic units and reverse converters for RNS applications [3]. Efficient architectures for the special moduli set have also been used in cryptography applications like IDEA [2].