The UCSC Kestrel Application-Unspecific Processor

The UCSC Kestrel parallel processor is part of an evolution from application-specific to specialized to application-unspecific processing. Kestrel combines an ALU, multiplier, and local memory, with systolic shared registers for seamless merging of communication and computation, and an innovative condition stack for rapid conditionals. The result has been a readily programmable and efficient co-processor for many applications. Experience with Kestrel indicates that programmable systolic processing, and its natural combination with the single instruction-multiple data (SIMD) parallel architecture, will be an effective design choice for years to come

1. Introduction

Biological sequence analysis has long been a standard problem for application-specific processing. The underlying algorithms are simple and regular, and the amount of data for analysis is prodigious. University and commercial projects have tackled this problem since the early days of VLSI, and many of these approaches are chronicled within the proceedings of ASAP and its predecessor conferences.