Experimental Demonstration of a Dynamic 10 G bit/s WDM Header/Label Recognition Structure

In this paper, we experimentally demonstrate a dynamic wavelength-division-multiplexing (WDM) header/label recognition structure that processes on-the-fly WDM patterns. An opto-VLSI processor is used to dynamically generate digital phase holograms that control the wavelength components of the label/header to create digital wavelength profiles. An autocorrelation function of a high-peak is generated when a label bit pattern matches a digital wavelength profile. The main attractive feature of using an opto-VLSI processor is that the lookup table of matching digital wavelength profiles does not need modification when the data bit-rate is upgraded. The dynamic pattern recognition structure is experimentally demonstrated at 10 Gbit/s for 4-, 6-, and 8-bit labels.

I. Introduction

Optical packet switching networks are a key technology for realizing next-generation, large capacity, high scalability, and fine granularity optical networks. In conventional optical packet switched networks, packets are converted at each node from the optical domain to the electrical domain in order to process the header and make routing decisions [1]. Moreover, as the number of nodes increases, the lookup time becomes a significant source of latency. To avoid optical-to-electrical conversion, and hence, minimise the lookup time, the use of all-optical correlators for optical header recognition has been proposed and demonstrated [1]–[4].