Characterization of self-aligned transfer gates for 1µm bubble contiguous-disk devices

Self-aligned transfer gates for contiguous disk bubble devices have been characterized at 200kHz. These devices require a single masking level to define both the current control conductors and ion-implantation pattern. Switch operation relies on a unipolar current pulse in the major loop which stripes the bubble between major and minor loops along a bridging charged-wall; directionality is provided by the crystalline symmetry effects in the drive layer. Representative transfer pulse parameters for a 28 Oe (8%) overlapping bias field margin are: (i) transfer-in, amplitude 115 mA ±25%, width 0.1μs ±15% and phase margin
\pm16\deg
. (ii) transfer-out, amplitude 160 mA ±9%, width 0.88μs ±10% and phase margin
\pm10\deg
. The transfer pulse requirements are discussed in terms of the behaviour of the charged-walls in the garnet drive layer.