I. Introduction
In the past few years, advances in the quality of GaAs-based epitaxial technology have made possible the wide use of GaAs pHEMTs for wireless transceiver applications, where power performance is an important factor. There are many approaches that can be used to increase the power density in GaAs pHEMTs, including optimization of the process and the structural layers. For example, field-plate and double recess techniques have been used to reduce the maximum electrical field near the gate edge [1], [2]. High-voltage operation can also be achieved with a cascode circuit [3], where the voltage is equally divided between two independent devices. The dual-gate device [4], [5] technology, which is based on this cascode configuration, has already been utilized to obtain a higher breakdown voltage without adding to the device size. The total electrical field is shared between the two depletion regions inside the conducting channel of the device, meaning that the maximum electrical field is decreased.