Abstract:
An operational model is described for FCAT-II (Floating Si-gate Channel Corner Avalanche Transition-II) nonvolatile memory devices that can perform high-speed write 1 and...Show MoreMetadata
Abstract:
An operational model is described for FCAT-II (Floating Si-gate Channel Corner Avalanche Transition-II) nonvolatile memory devices that can perform high-speed write 1 and write 0 operations with 15-V pulses of less than 50-ns duration. The distinct feature of the high-speed write 1 characteristics, including the novel write enable threshold phenomena, are quantitatively analyzed by introducing an equivalent circuit model in which the resistive floating gate over the oxide steps plays an important role as a negative resistance in the transient condition. Transient analyses of the write 1 characteristics are carried out using numerical circuit analysis. Fowler-Nordheim tunnel-governed write 0 characteristics are also evaluated and used for numerical analysis of the write 1 mode. Analytical results have quantitatively good coincidence with experimental results after introduction of a potential raising effect at the floating gate edges, as was predicted in the previous paper [1].
Published in: IEEE Transactions on Electron Devices ( Volume: 31, Issue: 6, June 1984)