I. Introduction
Gate-induced drain leakage current (GIDL) resulting from the band-to-band tunneling is a major source of drain leakage and has become a reliability issue for miniaturized metal oxide semiconductor field effect transistor (MOSFET) and flash memory cell devices [1]–[4]. As the band-to-band tunneling current has an exponential dependence on the silicon surface electric field in the gate-to-drain overlap region [1], [2], a small change in the electric field due to charge trapping in the gate oxide overlapping the drain extension could cause a very significant change in the band-to-band tunneling leakage current. It is well known that electrical stress such as constant current (voltage) stress or hot-carrier injections can lead to charge trapping in the gate oxide over the channel [5]. However, fewer studies have been reported on the edge charge trapping in the oxide overlapping the drain extensions which has a very significant impact on the drain leakage current. In addition, there is also a lack of the knowledge of the influence of the oxide thickness on the edge charge trapping. In this work, we have conducted a study of the edge charge trapping caused by electrical stress for the gate oxide thickness of 6.5, 3.9, and 2.0 nm by using a simple approach to analyze the change of the drain band-to-band tunneling current, and a strong dependence of the edge charge trapping on the gate oxide thickness is observed.