Variation in emitter diffusion depth by TiSi/sub 2/ formation on polysilicon emitters of Si bipolar transistors

The emitter diffusion depth of wider emitters was found to be shallower than that of narrower emitters for transistors with a TiSi/sub 2/-formed in-situ phosphorus doped polysilicon (IDP) emitter. This dependence of emitter diffusion depth on emitter width W/sub E/ resulted in a large dependence of h/sub FE/ on W/sub E/. We found that the emitter diffusion in emitters with TiSi/sub 2/ formation was shallower than that in emitters without TiSi/sub 2/ formation. We conclude that the dependence of emitter diffusion depth on W/sub E/ is due to variation in phosphorus diffusivity caused by the TiSi/sub 2/ formation. We found by X-ray diffraction measurements that TiSi/sub 2/ formation reduced the crystal lattice volume of the IDP emitter layers by 0.2-0.30%. We attribute this reduction to a reduction in packing density due to a supersaturation of vacancies caused by the TiSi/sub 2/ formation. We believe that the vacancy supersaturation decreases the density of interstitials in the emitter regions, which decreases the emitter diffusion depth, and that the dependence of emitter diffusion depth on W/sub E/ is due to variations in the density of vacancies depending on W/sub E/.

I. Introduction

Titanium self-aligned silicide (Ti salicide) is a standard structure for deep-submicron CMOS transistors [1], [2]. In bipolar-CMOS merged (BiCMOS) devices using CMOS transistors with Ti salicide technology, the Ti silicide (TiSi₂) layers are usually formed on the base polysilicon electrodes and polysilicon emitters of bipolar transistors [3]. The TiSi₂ layer on the polysilicon emitter reduces the contact resistance between the polysilicon emitter and the metal electrode. This layer also acts as a stopper during dry etching to form contact holes and prevent the polysilicon emitters from becoming thin. Fig. 1.

Cross section of a bipolar transistor with a TiSi₂-formed polysilicon emitter.