Channel length extraction for DMOS transistors using capacitance-voltage measurements

This paper presents a new measurement method for extraction of submicrometer channel lengths in double diffused MOS (DMOS) transistors. The method is based on capacitance-voltage (CV) measurements of the gate to p-base and the gate to drain capacitance. A channel length of 0.3 /spl mu/m has been measured on DMOS transistors. Numerical device simulations and small-signal capacitance simulations support the result and the measurement principle along with scanning capacitance microscopy (SCM) measurements.