Theoretical and experimental investigation of watt-level wafer scale integration microwave and millimeter-wave GaAs and AlGaAs frequency multipliers

The development of wafer-level integration of barrier structure devices for high-power high-frequency applications is considered. The nonlinear capacitance of these semiconductor barrier devices was exploited to produce harmonic frequencies for use as millimeter-wave solid-state frequency multiplication sources. A back-to-back configuration was used in the monolithic planar integration of barrier structure devices to provide highly efficient odd harmonic multiplication. Both tripler and quintupler configurations of these barrier devices were constructed to obtain a higher output frequency from stable low-frequency power sources. The efficiency of BIN (barrier-intrinsic-n/sup +/) diode frequency triplers and quintuplers was determined from C-V data using a large-signal multiplier analysis program to predict the performance of these barrier-structure multipliers. The model developed by R.J. Hwu et al. (1988) was extended and combined with a large-signal multiplier analysis to optimize the device structure and pumping conditions. For low-temperature operation, a large enhancement is seen in the efficiency resulting from the increased steepness of the C-V curve. High multiplication efficiencies (22%) can be attained even at very low input power levels (2 mW per device element) from the experimental device, which has a cutoff frequency of 600 GHz. AlGaAs/GaAs heterojunction structures were also studied as highly efficient multiplication devices.