I. Introduction
Recently, serial interconnect technologies have matured to enable high-speed switched architectures with excellent performance and scalability. Because of the serialization trend, data rates of serial chip-to-chip digital I/O communication channels have increased considerably to over 10 Gb/s [1]. Due to these increasing data rates, high-speed digital I/O signals suffer from frequency-dependent losses on printed circuit boards (PCBs) and at cables [see Fig. 1(a)]. Consequently, ISI problems result, as shown in Fig. 1(b), and there is subsequent degradation of the receiver eye-opening, jitter performance, and voltage margin with increased bit error rate (BER) [2], [3].
(a) Frequency-dependent losses of microstrip lines with various lengths on PCB. (b) Illustration of ISI for (top) transmitted signal and (bottom) received signal through a 40-cm-long microstrip line on PCB with a data rate of 16 Gb/s.