Concatenation of Functional Test Subsequences for Improved Fault Coverage and Reduced Test Length

Functional test sequences have several advantages over structural tests when they are applied at-speed. A large pool of functional test sequences may be available for a circuit due to the application of a simulation-based design verification process. This paper describes a versatile procedure that uses a pool of functional test sequences as a basis for forming a single compact functional test sequence that achieves the same or higher gate-level fault coverage than the given pool. The procedure extracts test subsequences from the test sequences in the pool and concatenates them to form a single test sequence. It also employs an enhanced static test compaction process aimed at improving the fault coverage in addition to reducing the test sequence length.

1 Introduction

Functional test sequences are applied to a sequential circuit in its functional mode of operation. A functional test sequence specifies the values to be applied to the primary inputs during test application. Unlike structural tests, functional test sequences avoid the use of scan chains. Functional test sequences may be used for manufacturing testing since they detect defects that are not detected by scan-based tests [1], or to avoid overtesting. Overtesting occurs when at-speed scan-based tests are used for detecting delay faults, and create nonfunctional operation conditions during functional capture cycles [2], [3]. Functional test sequences may also be used for speed binning. The study in [4] shows that circuits fail at significantly lower frequencies under scan-based tests than under functional test sequences that have similar delay fault coverage. Therefore, scan-based tests underestimate the circuit speed, and a more accurate estimate is obtained using functional test sequences.