Programmable Clock Signal Generators For SC Structures

This paper discusses possibility of the use of PLD circuits to control switched capacitors (SC) structures. It is well known that several years the SC technique was introduced ago in order to replace resistors by simple configurations of a small capacitor with some switches, which (up to capacitance ratios) may be precisely realized in integrated circuits. The aim of the presented generator of programmable sequences is to show an efficient way of controlling the SC circuits, e.g., the SC delay line with the so-called even-odd delay elements. PLD circuits contained in the ALTERA design kit and the MAX+plusII software kit were used in the presented design. Simulations and measurements presented in this paper prove many important advantages of the programmable logic devices applied for the generation of multiphase synchronous clock signals