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Laser optical in-circuit measurement system for immunity applications

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Published in: 2006 IEEE International Symposium on Electromagnetic Compatibility, 2006. EMC 2006.

Date of Conference: 14-18 August 2006

Date Added to IEEE Xplore: 09 October 2006

Print ISBN:1-4244-0293-X

ISSN Information:

DOI: 10.1109/ISEMC.2006.1706373

Conference Location: Portland, OR, USA

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I. Introduction

During immunity testing voltages and currents are superimposed onto the normal voltages caused by the operation of the system. In digital circuits this can lead to bit flips or added jitter, in analog system it disturbs the signal. Using scanning methods [1] it is possible to identify the sensitive nets. As next step the voltages of the critical nets need to be measured while disturbing the system using e.g., ESD.

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