Asynchronous biphasic pulse signal coding and its CMOS realization

An asynchronous biphasic pulse train signal representation mechanism is proposed for low bandwidth, low power sensor applications. We prove that this novel pulse coding method provides lossless encoding theoretically. We also present a CMOS circuit realization using the AMI 0.6 mum process. Cadence simulation results show that the reconstructed signal has 8 effective bits of resolution with less than 100 muW of total power consumption