Abstract:
The problem of optimally sizing the transistors in a digital MOS VLSI circuit is examined. Macro-models are developed and new theorems on the optimal sizing of the transi...Show MoreMetadata
Abstract:
The problem of optimally sizing the transistors in a digital MOS VLSI circuit is examined. Macro-models are developed and new theorems on the optimal sizing of the transistors in a critical path are presented. The results of a design automation procedure to perform the optimization is discussed.
Published in: 21st Design Automation Conference Proceedings
Date of Conference: 25-27 June 1984
Date Added to IEEE Xplore: 06 February 2006
Print ISBN:0-8186-0542-1
Print ISSN: 0738-100X