CMOS switched-op amp based sample-and-hold circuit

This paper presents a sample-and-hold design that is based on a switched-op amp. By using a switched-opamp topology charge injection errors are greatly reduced by turning off the transistors in saturation instead of triode region. A pseudo-differential topology is used to cancel the remaining signal independent clock feedthrough error. Switched op amps with differential pairs in both weak inversion and strong inversion are designed. Detailed simulation and measurement results of a switched-opamp based sample and hold circuit is used to show its performance superiority over traditional switched capacitor topologies.