Highly efficient CMOS class E power amplifier for wireless communications

A novel high efficiency, low voltage CMOS class E power amplifier for wireless communications is presented. The power amplifier operating at 1.8 GHz is designed and simulated with a 0.6 /spl mu/m CMOS process. A two-stage power amplifier architecture with a band-rejection filter for first stage driver delivers 24.8 dBm of power to the 50 /spl Omega/ load with a power added efficiency greater than 73% at a supply voltage of 2.5 V.