Analog CMOS design of the incremental credit assignment (ICRA) scheme for time series classification

The Incremental CRedit Assignment (ICRA) scheme has been introduced and its application to time series classification has been shown by simulation results. In this work an analog CMOS design of its decision module is described and its characteristics are given. The performance of the analog CMOS circuit was according to the theoretical simulations and the results obtained were very promising for the application of the circuit in practical classification problems, like speech recognition.