Fabrication and electrical performance of high aspect ratio gated silicon field emission arrays

This paper describes a new fabrication approach for field emitter arrays that uncouples the emitter or column height from the gate aperture. In this approach, low pressure chemical vapor deposition (LPCVD) of SiO/sub 2/, which deposits conformally on the tip-on-post structure, is employed followed by a series of photoresist planarization layers and side wall SiO/sub 2/ etch procedures to create small apertures. This procedure is fundamentally different from previous planarization and etch-back techniques.