Electrothermal behavior of deep submicron nMOS transistors under high current snapback (ESD/EOS) conditions

We present the underlying mechanisms of second breakdown in deep submicron nMOS transistors under high current snapback conditions. The onset of second breakdown is shown to be determined by a rapid increase in the thermally generated component of the substrate (base) current. Simplified simulation methodologies for evaluating high current robustness using isothermal device simulations are demonstrated and good correlations with experimental data have been obtained.<
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