Abstract:
A review is presented of electrical testing, failure mechanisms, fault models, fault simulation, testability analysis, and test-generation methods for CMOS VLSI circuits....Show MoreMetadata
First Page of the Article
Abstract:
A review is presented of electrical testing, failure mechanisms, fault models, fault simulation, testability analysis, and test-generation methods for CMOS VLSI circuits. The relationships between the most commonly used fault models are explored. Various fault simulation methods are contrasted. The basic mechanisms used in test-vector generation are illustrated by examples. The importance of testability analysis as a guide to design and test generation is discussed. Algorithms for automatic test-pattern generation are summarized.<>
Published in: IEEE Transactions on Industrial Electronics ( Volume: 36, Issue: 2, May 1989)
DOI: 10.1109/41.19061
First Page of the Article