An input-free V/sub T/ extractor circuit using a two-transistor differential amplifier

A three-terminal circuit (power, ground, and output) that provides a DC output voltage equal to the MOS threshold voltage V/sub T/ is presented. The circuit uses the four-terminal extractor topology of Z. Wang (1992), but it adds self-biasing and a two-transistor differential amplifier to provide a ground-referenced output voltage.<
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