Characteristics and performance of a 1 kbit Bloch line memory prototype

The design of a Bloch line memory prototype is presented. The different basic functions are studied experimentally. Two aspects of minor loop initialization are considered: memory clearing and bias field stability. Minor loop stability margins depend on material parameters and the groove design. The propagation of line pairs as well as line clusters is studied. The maximum line displacement is 2 mu /pulse. Bit propagation depends on the fall time of the vertical field pulse. At short fall time, pinning points hamper bit propagation. Preliminary results of the input/output gate show that the basic functions such as stripe head stretching, line control, and chopping are compatible. The major loop operation, including bubble propagation and stretching, is demonstrated.<
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